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MAX7060
280MHz to 450MHz Programmable
ASK/FSK Transmitter
Pin Description
12
PIN
1
2
3
4
5
6
7
8
9, 15, 24
10
11
12
13
14
16
17
18
19
20
21
22
23
—
NAME
GPO2_MOD
GPO1
DVDD
GPOVDD
FREQ0
FREQ1
FREQ2
LSHDN
N.C.
PAOUT
PAVDD
ROUT
PAVOUT
V DD5
AVDD
XTAL2
XTAL1
CS _DEV
SDI_PWR1
SCLK_PWR0
ENABLE
DIN
EP
FUNCTION
(SPI Mode/Manual Mode) Digital Input/Output. GPO2 output in SPI mode. Acts as an SPI data
output when CS _DEV is low. ASK (0)/FSK (1) modulation select input in manual mode. This pin is
internally pulled down in manual mode.
General-Purpose Output 1. In SPI mode, this pin can output many internal status signals. In
manual mode, this pin outputs the synthesizer lock-detect (lockdet) signal.
Digital-Supply Voltage Input. Bypass to GND with a 0.01 F F capacitor as close as possible to the pin.
Power-Supply Voltage Input for GPOs and ESD-Protection Devices. Bypass to GND with a
0.01 F F capacitor as close as possible to the pin.
Frequency-Select Pin 0 in Manual Mode. Internally pulled down. FREQ0 = FREQ1 = FREQ2 = 0
for SPI mode.
Frequency-Select Pin 1 in Manual Mode. Internally pulled down. FREQ0 = FREQ1 = FREQ2 = 0
for SPI mode.
Frequency-Select Pin 2 in Manual Mode. Internally pulled down. FREQ0 = FREQ1 = FREQ2 = 0
for SPI mode.
Low-Power Shutdown Current-Select Digital Input. Turns off internal POR circuit and disables
pullup/pulldown currents. Must be driven low for normal operation in 3V mode. Functional only in
3V mode. Connect to GND in 5V mode.
No Connection. Internally not connected. Leave unconnected.
Power Amplifier Output. Requires a pullup inductor to PAVOUT, which can be part of the output-
matching network to an antenna.
Power Amplifier Predriver Power-Supply Input. Bypass to GND with a 680pF capacitor and a
0.01 F F as close as possible to the pin.
Envelope-Shaping Resistor Connection. See the Typical Application Circuits and the ASK
Envelope Shaping sections for details.
Power Amplifier Power-Control Output. Controls the transmitted power. Connect to PA pullup
inductor. Bypass to ground with 680pF capacitor.
Supply Voltage Input. Bypass to ground with 0.01 F F and 0.1 F F capacitors.
Analog Supply Voltage and Regulator Output. Bypass to GND with 0.1 F F and 0.01 F F capacitors
as close as possible to the pin.
Crystal Input 2. XTAL2 can be driven from an AC-coupled external reference.
Crystal Input 1. AC-couple to GND if XTAL2 is driven from an AC-coupled external reference.
(SPI Mode/Manual Mode) Serial Peripheral Interface (SPI) Active-Low Chip-Select Input. FSK
frequency-deviation input (0 = low deviation, 1 = high deviation) in manual mode. Internally
pulled up.
(SPI Mode/Manual Mode) SPI Data Input in SPI Mode. Power-control MSB input in manual mode.
Internally pulled down.
(SPI Mode/Manual Mode) SPI Clock Input in SPI Mode. Power-control LSB input in manual
mode. Internally pulled down.
Enable Digital Input. All internal circuits (except the PA in ASK mode) are enabled on the rising
edge of ENABLE. Internally pulled down.
Transmit Data Digital Input. Internally pulled down.
Exposed Pad. Solder evenly to the board’s ground plane for proper operation.
Maxim Integrated
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